Zynq SoC-Based Acceleration of Retinal Blood Vessel Diameter Measurement
DOI:
https://doi.org/10.47852/bonviewAAES52023879Keywords:
Zynq, retinal blood vessel, diameter measurement, Field-Programmable Gate Array (FPGA)Abstract
Extensive research indicates a significant association between retinal artery diameter and systemic health issues, such as hypertension, diabetes, and cardiovascular disorders. The age-associated constriction of the retinal arterioles, especially next to the optic disc, has been recognized as a critical risk factor for arteriosclerosis and diabetes complications. Nevertheless, current techniques for quantifying retinal vascular diameters encounter difficulties, including variable imaging resolutions, computational inefficiency in CPU-dependent systems, and vulnerability to aberrations such as inadequate contrast or central light reflex. This research introduces an innovative Zynq System-on-Chip-based acceleration system aimed at processing binary retinal vessel pictures and producing accurate vessel diameter maps. Utilizing the parallel processing capabilities of Field-Programmable Gate Arrays (FPGAs) and improved job distribution, the proposed methodology surpasses conventional CPU-based techniques in terms of speed and precision. The system utilizes Hadamard product-based matrix operations to compute intersection widths between vessel segments and digitally generated lines at various orientations, guaranteeing sub-pixel accuracy. Simulation outcomes utilizing the DRIVE dataset indicate a processing time decrease of over 80% relative to MATLAB solutions. The suggested architecture attains 97.2% accuracy while effectively utilizing FPGA resources, comprising 63,400 look-up tables and 36 BRAM units on the Xilinx Artix-7 platform. This study addresses the disparity between clinical needs for real-time analysis and computing constraints, providing a scalable approach for high-throughput retinal diagnostics.
Received: 20 July 2024 | Revised: 14 April 2025 | Accepted: 1 May 2024
Conflicts of Interest
The author declares that he has no conflicts of interest to this work.
Data Availability Statement
Data sharing is not applicable to this article as no new data were created or analyzed in this study.
Author Contribution Statement
Yuyao Wang: Conceptualization, Methodology, Software, Validation, Formal analysis, Investigation, Resources, Data curation, Writing - original draft, Writing - review & editing, Visualization, Supervision, Project administration.
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